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LT1182/LT1183/LT1184/LT1184F CCFL/LCD Contrast Switching Regulators
FEATURES
s s s s s s s
DESCRIPTION
The LT(R)1182/LT1183 are dual current mode switching regulators that provide the control function for Cold Cathode Fluorescent Lighting (CCFL) and Liquid Crystal Display (LCD) Contrast. The LT1184/LT1184F provide only the CCFL function. The ICs include high current, high efficiency switches, an oscillator, a reference, output drive logic, control blocks and protection circuitry. The LT1182 permits positive or negative voltage LCD contrast operation. The LT1183 permits unipolar contrast operation and pins out an internal reference. The LT1182/LT1183 support grounded and floating lamp configurations. The LT1184F supports grounded and floating lamp configurations. The LT1184 supports only grounded lamp configurations. The
, LTC and LT are registered trademarks of Linear Technology Corporation.
Wide Input Voltage Range: 3V to 30V Low Quiescent Current High Switching Frequency: 200kHz CCFL Switch : 1.25A, LCD Switch: 625mA Grounded or Floating Lamp Configurations Open-Lamp Protection Positive or Negative Contrast Capability
APPLICATIONS
s s s s
Notebook and Palmtop Computers Portable Instruments Automotive Displays Retail Terminals
TYPICAL APPLICATION
90% Efficient Floating CCFL Configuration with Dual Polarity LCD Contrast
UP TO 6mA ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR 0.5 TO PREVENT DAMAGE TO THE LT1182 HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON. C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20 Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 L1 = COILTRONICS CTX210605 L2 = COILTRONICS CTX100-4 L3 = COILTRONICS CTX02-12403 *DO NOT SUBSTITUTE COMPONENTS COILTRONICS (407) 241-7876 0A TO 45A ICCFL CURRENT GIVES 0mA TO 6mA BULB CURRENT. THIS IS EQUAL TO 0% TO 90% DUTY CYCLE FOR THE PWM SIGNAL. R4 46.4k 1% C6 2.2F C5 1000pF R2 220k 3 2 1 C3B 2.2F 35V R1 750 4 5 LAMP 10 6 C2 27pF 3kV L1 CCFL BACKLIGHT APPLICATION CIRCUITS CONTAINED IN THIS DATA SHEET ARE COVERED BY U.S. PATENT NUMBER 5408162 AND OTHER PATENTS PENDING
+
+
C1* 0.068F R3 100k D5 BAT85 L2 100H 1 D1 1N5818
+
Q1*
Q2*
D3 1N5934A 4 24V D2 2 1N914
V (PWM) 0V TO 5V 1kHz PWM
R5, 43.2k, 1%
CCFL PGND ICCFL DIO
CCFL VSW BULB BAT LT1182 ROYER VIN FBP FBN LCD VSW
16 15 14 13
2 3
+
C7, 1F
4 5 SHUTDOWN 6 C8, 0.68F 7 R7, 10K 8
CCFL VC AGND SHDN LCD VC LCD PGND
+
12 11 C9, 0.01F 10 9 R9, 4.99k, 1% 5V R10, 10k, 1%
C4 2.2F
R11, 20k, 1%
1182/3 TA01
U
U
U
C3A 2.2F 35V
BAT 8V TO 28V EITHER NEGCON OR POSCON MUST BE GROUNDED. GROUNDING NEGCON GIVES VARIABLE POSITIVE CONTRAST FROM 10V TO 30V. GROUNDING POSCON GIVES VARIABLE NEGATIVE CONTRAST FROM -10V TO - 30V. L3 6 9 N = 1:2 C11 22F 35V POSCON
C12 2.2F 35V
+
NEGCON D4 1N914 R12 20k R13 8.45k 1% C10 0.01F R14 1.21k 1%
VIN 3V
1
LT1182/LT1183/LT1184/LT1184F
DESCRIPTION
LT1184/LT1184F pin out the reference for simplified programming of lamp current. The LT1182/LT1183/LT1184/LT1184F operate with input supply voltages from 3V to 30V. The ICs also have a battery supply voltage pin that operates from 4.5V to 30V. The LT1182/LT1183 draw 9mA typical quiescent current while the LT1184/LT1184F draw 6mA typical quiescent current. An active low shutdown pin typically reduces total supply current to 35A for standby operation. A 200kHz switching frequency minimizes the size of required magnetic components. The use of current mode switching techniques with cycle-by-cycle limiting gives high reliability and simple loop frequency compensation. The LT1182/ LT1183/LT1184/LT1184F are all available in 16-pin narrow SO packages.
ABSOLUTE MAXIMUM RATINGS
VIN, BAT, Royer, Bulb .............................................. 30V CCFL VSW, LCD VSW ............................................... 60V Shutdown ................................................................. 6V ICCFL Input Current .............................................. 10mA DIO Input Current (Peak, < 100ms) .................... 100mA LT1182: FBP, FBN, LT1183: FB Pin Current......... 2mA LT1183/LT1184/1184F: REF Pin Source Current .... 1mA Junction Temperature (Note 1) ............................ 100C Operating Ambient Temperature Range ..... 0C to 100C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW CCFL PGND ICCFL DIO CCFL VC AGND SHUTDOWN LCD VC LCD PGND 1 2 3 4 5 6 7 8 16 CCFL VSW 15 BULB 14 BAT 13 ROYER 12 VIN 11 FBP 10 FBN 9 LCD VSW
ORDER PART NUMBER LT1182CS
S PACKAGE 16-LEAD PLASTIC SO TJMAX = 100C, JA = 100C/W TOP VIEW CCFL PGND ICCFL DIO CCFL VC AGND SHUTDOWN NC NC 1 2 3 4 5 6 7 8 16 CCFL VSW 15 BULB 14 BAT 13 NC 12 VIN 11 REF 10 NC 9 NC
ORDER PART NUMBER LT1184CS
S PACKAGE 16-LEAD PLASTIC SO TJMAX = 100C, JA = 100C/W
Consult factory for Industrial and Military grade parts
2
U
U
W
WW
U
U
W
TOP VIEW CCFL PGND ICCFL DIO CCFL VC AGND SHUTDOWN LCD VC LCD PGND 1 2 3 4 5 6 7 8 16 CCFL VSW 15 BULB 14 BAT 13 ROYER 12 VIN 11 REF 10 FB 9 LCD VSW
ORDER PART NUMBER LT1183CS
S PACKAGE 16-LEAD PLASTIC SO TJMAX = 100C, JA = 100C/W TOP VIEW CCFL PGND ICCFL DIO CCFL VC AGND SHUTDOWN NC NC 1 2 3 4 5 6 7 8 16 CCFL VSW 15 BULB 14 BAT 13 ROYER 12 VIN 11 REF 10 NC 9 NC
ORDER PART NUMBER LT1184FCS
S PACKAGE 16-LEAD PLASTIC SO TJMAX = 100C, JA = 100C/W
LT1182/LT1183/LT1184/LT1184F
ELECTRICAL CHARACTERISTICS
TA = 25C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V, (LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND, (LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.
SYMBOL IQ ISHDN PARAMETER Supply Current SHUTDOWN Supply Current SHUTDOWN Input Bias Current SHUTDOWN Threshold Voltage f Switching Frequency Measured at CCFL VSW and LCD VSW, ISW = 50mA, ICCFL = 100A, CCFL VC = Open, (LT1182) FBN = FBP = 1V, (LT1183) FB = 1V, (LT1182/LT1183) LCD VC = Open Measured at CCFL VSW and LCD VSW
q
CONDITIONS LT1182/LT1183: 3V VIN 30V LT1184/LT1184F: 3V VIN 30V SHUTDOWN = 0V, CCFL VC = LCD VC = Open (Note 2) SHUTDOWN = 0V, CCFL VC = LCD VC = Open
q q q
MIN
TYP 9 6 35 3
MAX 14 9.5 70 6 1.2 225 240
UNITS mA mA A A V kHz kHz % % V
0.6 175
0.85 200 200 85 85 70
q
160 80 75 60
DC(MAX) BV
Maximum Switch Duty Cycle Switch Breakdown Voltage Switch Leakage Current ICCFL Summing Voltage
Measured at CCFL VSW and LCD VSW VSW = 12V, Measured at CCFL VSW and LCD VSW VSW = 30V, Measured at CCFL VSW and LCD VSW 3V VIN 30V, Measured on LT1182/LT1183
q
20 40 0.41 0.37 0.425 0.385 0.45 0.45 0.465 0.465 5 -5
q q q q q q
A A V V V V mV A A/A A/mA V V V A %/V A V A A A mA/A V V
0.49 0.54 0.505 0.555 15 15 5.20 104 0.3 2.4 1.3 1.07 0.16 150 7.5 9 3.0 2.6 1.0 30 1.264 1.274 70 30
3V VIN 30V, Measured on LT1184/LT1184F
q
ICCFL Summing Voltage for Input Programming Current CCFL VC Offset Sink Current CCFL VC Source Current for ICCFL Programming Current CCFL VC to DIO Current Servo Ratio CCFL VC Low Clamp Voltage CCFL VC High Clamp Voltage CCFL VC Switching Threshold CCFL High-Side Sense Servo Current CCFL High-Side Sense Servo Current Line Regulation CCFL High-Side Sense Supply Current Bulb Protect Servo Voltage Bulb Input Bias Current ILIM1 VSAT1 IQ ISW1 VREF CCFL Switch Current Limit CCFL Switch On-Resistance Supply Current Increase During CCFL Switch On-Time Reference Voltage Reference Output Impedance
ICCFL = 0A to 100A CCFL VC = 1.5V, Positive Current Measured into Pin ICCFL = 25A, 50A, 75A, 100A, CCFL VC = 1.5V DIO = 5mA out of Pin, Measure IVC at CCFL VC = 1.5V VBAT - VBULB = Bulb Protect Servo Voltage ICCFL = 100A CCFL VSW DC = 0% ICCFL = 100A, IVC = 0A at CCFL VC = 1.5V BAT = 5V to 30V, ICCFL = 100A, IVC = 0A at CCFL VC = 1.5V Current Measured into BAT and Royer Pins ICCFL = 100A, IVC = 0A at CCFL VC = 1.5V, Servo Voltage Measured Between BAT and Bulb Pins ICCFL = 100A, IVC = 0A at CCFL VC = 1.5V Duty Cycle = 50% Duty Cycle = 75% (Note 3) CCFL ISW = 1A CCFL ISW = 1A Measured at REF (Pin 11) on LT1183/LT1184/LT1184F
q q q q q q
5 4.95 99 0.1 2.1 0.95 1.00 0.1
4.70 94 1.7 0.6 0.93
50 6.5
100 7.0 5
1.25 0.9
1.9 1.6 0.6 20
1.224 1.214 20 5
1.244 1.244 45 15
Measured at REF (Pin 11) on LT1183 Measured at REF (Pin 11) on LT1184/LT1184F
q q
3
LT1182/LT1183/LT1184/LT1184F
ELECTRICAL CHARACTERISTICS
TA = 25C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V, (LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND, (LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.
SYMBOL PARAMETER VREF - ICCFL Summing Voltage VREF - ICCFL Summing Voltage REF1 LCD FBP/FB Reference Voltage REF1 Voltage Line Regulation FBP/FB Input Bias Current LCD FBN/FB Offset Voltage Offset Voltage Line Regulation FBN/FB Input Bias Current gm FBP/FB to LCD VC Transconductance FBN/FB to LCD VC Transconductance LCD Error Amplifier Source Current LCD Error Amplifier Sink Current LCD VC Low Clamp Voltage LCD VC High Clamp Voltage LCD VC Switching Threshold ILIM2 VSAT2 IQ ISW2 LCD Switch Current Limit LCD Switch On-Resistance Supply Current Increase During LCD Switch On-Time Switch Minimum On-Time CONDITIONS Measured on LT1183
q
MIN 0.760 0.725 0.740 0.705 1.224 1.214
TYP 0.795 0.795 0.775 0.775 1.244 1.244 0.01 0.35
MAX 0.830 0.865 0.810 0.845 1.264 1.274 0.03 1.0 -4 -1 0.2
UNITS V V V V V V %/V A mV mV %/V A
Measured on LT1184/LT1184F
q
LT1182: Measured at FBP Pin, FBN = 1V, LCD VC = 0.8V LT1183: Measured at FB Pin, LCD VC = 0.8V 3V VIN 30V, LCD VC = 0.8V LT1182: FBP = REF1, FBN = 1V, LCD VC = 0.8V LT1183: FB = REF1, LCD VC = 0.8V LT1182: Measured at FBN Pin, FBP = 0V, LCD VC = 0.8V LT1183: Measured at FB Pin, LCD VC = 0.8V 3V VIN 30V, LCD VC = 0.8V LT1182: FBN = Offset Voltage, FBP = 0V, LCD VC = 0.8V LT1183: FB = Offset Voltage, LCD VC = 0.8V LT1182: IVC = 25A, FBN = 1V LT1183: IVC = 25A LT1182: IVC = 25A, FBP = GND LT1183: IVC = 25A LT1182: FBP = FBN = 1V or 0.25V, LT1183: FB = 1V or 0.25V LT1182: FBP = FBN = 1.5V or - 0.25V, LT1183: FB = 1.5V or - 0.25V LT1182: FBP = FBN = 1.5V, LT1183: FB = 1.5V LT1182: FBP = FBN = 1V, LT1183: FB = 1V LT1182: FBP = FBN = 1V, LT1183: FB = 1V, VSW DC = 0% Duty Cycle = 50% Duty Cycle = 75% (Note 3) LCD ISW = 0.5A LCD ISW = 0.5A Measured at CCFL VSW and LCD VSW
q q q q q q q q q q
- 20 - 27
- 12 - 12 0.01
- 3.0 650 500 550 400 50 35
- 1.0 900 900 800 800 100 100 0.01 1150 1300 1050 1200 175 175 0.3 2.4 1.3 1.5 1.3 1.65 30
mhos mhos mhos mhos A A V V V A A mA/A s
1.7 0.6
q q q
2.0 0.95 1.00 0.85 1.0 20 0.45
0.625 0.400
The q denotes specifications which apply over the specified operating temperature range. Note 1: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LT1182CS/LT1183CS/LT1184CS/LT1184FCS: TJ = TA + (PD x 100C/W)
Note 2: Does not include switch leakage. Note 3: For duty cycles (DC) between 50% and 75%, minimum guaranteed switch current is given by ILIM = 1.4(1.393 - DC) for the CCFL regulator and ILIM = 0.7(1.393 - DC ) for the LCD contrast regulator due to internal slope compensation circuitry.
4
LT1182/LT1183/LT1184/LT1184F TYPICAL PERFORMANCE CHARACTERISTICS
LT1182/LT1183 Supply Current vs Temperature
14 13
SHUTDOWN CURRENT (A)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
12 11 10 9 8 7 6 5 4 -75 - 50 - 25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 G01
VIN = 30V VIN = 3V
Shutdown Input Bias Current vs Temperature
6
1.2
SHUTDOWN INPUT BIAS CURRENT (A)
SHUTDOWN THRESHOLD VOLTAGE (V)
5 4 VIN = 30V 3 2 1 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 G04
1.0 0.9 0.8 0.7 0.6 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 G05
CCFL FREQUENCY (kHz)
VIN = 5V
VIN = 3V
CCFL Duty Cycle vs Temperature
95 93 91
240 230
CCFL DUTY CYCLE (%)
LCD FREQUENCY (kHz)
89 87 85 83 81 79 77 75 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G07
LCD DUTY CYCLE (%)
UW
LT1184/LT1184F Supply Current vs Temperature
10 9 8 7 6 5 4 3 2 1 0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 G02
Shutdown Current vs Temperature
100 90 8O 70 60 50 40 30 20 10 0 -75 -50 - 25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 G03
VIN = 30V
VIN = 30V VIN = 3V
VIN = 5V VIN = 3V
Shutdown Threshold Voltage vs Temperature
240 230 220 210 200 190 180 170
CCFL Frequency vs Temperature
1.1
VIN = 30V VIN = 3V
160 -75 -50 -25
0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G06
LCD Frequency vs Temperature
95 93 91
220 210 200 190 180 170 160 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G08
LCD Duty Cycle vs Temperature
89 87 85 83 81 79 77 75 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G09
VIN = 30V VIN = 3V
5
LT1182/LT1183/LT1184/LT1184F TYPICAL PERFORMANCE CHARACTERISTICS
ICCFL Summing Voltage vs Temperature
0.53 0.52 0.51 0.50 0.49 0.48 VIN = 30V 0.47 VIN = 5V 0.46 0.45 VIN = 3V 0.44 0.43 0.42 0.41 0.40 0.39 0.38 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G10
CCFL VC SINK OFFSET CURRENT (A)
ICCFL SUMMING VOLTAGE (mV)
ICCFL SUMMING VOLTAGE (V)
CCFL VC Source Current for ICCFL Programming Current vs Temperature
5.10
CCFL VC SOURCE CURRENT FOR ICCFL PROGRAMMING CURRENT (A/A)
I(DIO) = 10mA 0.8 0.6 0.4 0.2 0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G14
NEGATIVE DIO VOLTAGE (V)
5.05
POSITIVE DIO VOLTAGE (V)
5.00 4.95 4.90 4.85
ICCFL = 100A ICCFL = 50A ICCFL = 10A
4.80 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G13
CCFL VC to DIO Current Servo Ratio vs Temperature
CCFL VC DIO CURRENT SERVO RATIO (A/mA)
103 0.30
CCFL VC LOW CLAMP VOLTAGE (V)
CCFL VC HIGH CLAMP VOLTAGE (V)
102 101 100 99 98 97 96 95 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G16
I(DIO) = 10mA I(DIO) = 1mA I(DIO) = 5mA
6
UW
ICCFL Summing Voltage Load Regulation
5 4 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 0 10 9 8 7 6 5 4
CCFL VC Offset Sink Current vs Temperature
CCFL VC = 1.5V
T = -55C
CCFL VC = 1.0V
T = 25C
T = 125C
20 40 60 80 100 120 140 160 180 200 ICCFL PROGRAMMING CURRENT (A)
LT1182 * G11
3 2 1 CCFL VC = 0.5V 0 -1 -2 -3 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G12
Positive DIO Voltage vs Temperature
1.2 1.0 I(DIO) = 5mA
1.6 1.4
Negative DIO Voltage vs Temperature
I(DIO) = 10mA 1.2 1.0 0.8 0.6 0.4 0.2 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G15
I(DIO) = 5mA I(DIO) = 1mA
I(DIO) = 1mA
CCFL VC Low Clamp Voltage vs Temperature
2.4 2.3 2.2 2.1 2.0 1.9 1.8
CCFL VC High Clamp Voltage vs Temperature
0.25 0.20 0.15 0.10 0.05 0 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G17
1.7 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G18
LT1182/LT1183/LT1184/LT1184F TYPICAL PERFORMANCE CHARACTERISTICS
CCFL VC Switching Threshold Voltage vs Temperature
CCFL VC SWITCHING THRESHOLD VOLTAGE (V)
1.3
0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.10 0 -75 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125
LT1182 * G20
1.1 1.0 0.9 0.8 0.7 0.6 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G19
LDC VC HIGH CLAMP VOLTAGE (V)
LCD VC LOW CLAMP VOLTAGE (V)
1.2
LCD VC Switching Threshold Voltage vs Temperature
LDC VC SWITCHING THRESHOLD VOLTAGE (V)
CCFL HIGH-SIDE SENSE NULL CURRENT (A)
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G22
CCFL HIGH-SIDE SENSE LINE REGULATI0N (%V)
CCFL High-Side Sense Supply Current vs Temperature
CCFL HIGH-SIDE SENSE SUPPLY CURRENT (A) 150 7.5
BULB PROTECT SERVO VOLTAGE (V)
140 130 120 110 100 90 80 70 60 50 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G25
7.3 7.2 7.1 7.0 6.9 6.8 6.7 6.6 ICCFL = 10A ICCFL = 50A ICCFL = 100A
BULB INPUT BIAS CURRENT (A)
UW
LCD VC Low Clamp Voltage vs Temperature
1.00 0.09
LCD VC High Clamp Voltage vs Temperature
2.4 2.3 2.2 2.1 2.0 1.9 1.8 1.7 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G21
CCFL High-Side Sense Null Current vs Temperature
1.060 1.040 1.020 1.000 0.980 0.960 0.940 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G23
CCFL High-Side Sense Null Current Line Regulation vs Temperature
0.160 0.140 0.120 0.100 0.080 0.060 0.040 0.020 0.000 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G24
Bulb Protect Servo Voltage vs Temperature
10 7.4 8
Bulb Input Bias Current vs Temperature
6
4
2
6.5 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G26
0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G27
7
LT1182/LT1183/LT1184/LT1184F TYPICAL PERFORMANCE CHARACTERISTICS
1.274
LCD FBP REFERENCE VOLTAGE (V)
FBP REFERENCE VOLTAGE LINE REGULATION (%/V)
LCD FBP Reference vs Temperature
FBP INPUT BIAS CURRENT (A)
LT1182 * G29
1.264 1.254 1.244 1.234 1.224 1.214 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G28
LCD FBN Offset Voltage vs Temperature
-1
LCD FBN OFFSET VOLTAGE (mV)
FBN INPUT BIAS CURRENT (A)
-3 -5 -7 -9 -11 -13 -15 -17 -19 -21 -23 - 25 -27 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
FBP TO LCD VC TRANSCONDUCTANCE (mhos)
FBN to LCD VC Transconductance vs Temperature
FBN TO LCD VC TRANSCONDUCTANCE (mhos)
1200 1100 1000 900 800 700 600 500 400 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G34
LT1183 REF 0UTPUT IMPEDANCE ()
65 60 55 50 45 40 35 30 25 20 -75 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G35
LT1184/84F REF OUTPUT IMPEDANCE ()
8
UW
FBP Reference Voltage Line Regulation vs Temperature
0.03 0.025 0.020 0.015 0.010 0.005 0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
FBP Input Bias Current vs Temperature
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G30
FBN Input Bias Current vs Temperature
3.0 2.5 2.0 1.5 1.0 0.5 0 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G32
FBP to LCD VC Transconductance vs Temperature
1300 1200 1100 1000 900 800 700 600 500 -75 - 50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G33
LT1183 REF Output Impedance vs Temperature
70 30
LT1184/84F REF Output Impedance vs Temperature
25
20
15
10
5 -75 - 50 -25 0
25 50 75 100 125 150 175 TEMPERATURE (C)
LT1182 * G36
LT1182/LT1183/LT1184/LT1184F TYPICAL PERFORMANCE CHARACTERISTICS
CCFL VSW Sat Voltage vs Switch Current
1.0 0.9 2.0
CCFL VSW SAT VOLTAGE (V)
LCD VSW SAT VOLTAGE (V)
0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.3 0.9 1.2 0.6 SWITCH CURRENT (A) 1.5 T = 25C T = 125C T = -5C
1.6
CCFL VSW CURRENT LIMIT (A)
LCD VSW Current Limit vs Duty Cycle
1.5
LCD VSW CURRENT LIMIT (A)
1.2
FORCED BETA
FORCED BETA
0.9
T = 25C T = 125C MINIMUM
T = 0C
0.6
0.3
0 0 10 20 30 40 50 60 DUTY CYCLE (%) 70 80 90
UW
LT1182 * G37
LT1182 * G40
LCD VSW Sat Voltage vs Switch Current
2.5
CCFL VSW Current Limit vs Duty Cycle
2.0 T = 0C T = 25C 1.5 T = 125C MINIMUM
1.2
T = 25C T = 125C T = -5C
0.8
1.0
0.4
0.5
0
0
0.3
0.9 1.2 0.6 SWITCH CURRENT (A)
1.5
0 0 10 20 30 40 50 60 DUTY CYCLE (%) 70 80 90
LT1182 * G38
LT1182 * G39
Forced Beta vs ISW on CCFL VSW
110 100 90 80 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 CCFL ISW (A)
LT1182 * G41
Forced Beta vs ISW on LCD VSW
100 90 80 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 LCD ISW (A)
LT1182 * G42
9
LT1182/LT1183/LT1184/LT1184F
PIN FUNCTIONS
LT1182/LT1183/LT1184/LT1184F CCFL PGND (Pin 1): This pin is the emitter of an internal NPN power switch. CCFL switch current flows through this pin and permits internal, switch-current sensing. The regulators provide a separate analog ground and power ground(s) to isolate high current ground paths from low current signal paths. Linear Technology recommends the use of star-ground layout techniques. ICCFL (Pin 2): This pin is the input to the CCFL lamp current programming circuit. This pin internally regulates to 450mV (LT1182/LT1183) or 465mV (LT1184/LT1184F). The pin accepts a DC input current signal of 0A to 100A full scale. This input signal is converted to a 0A to 500A source current at the CCFL VC pin. By shunt regulating the ICCFL pin, the input programming current can be set with DAC, PWM or potentiometer control. As input programming current increases, the regulated lamp current increases. For a typical 6mA lamp, the range of input programming current is about 0A to 50A. DIO (Pin 3): This pin is the common connection between the cathode and anode of two internal diodes. The remaining terminals of the two diodes connect to ground. In a grounded lamp configuration, DIO connects to the low voltage side of the lamp. Bidirectional lamp current flows in the DIO pin and thus the diodes conduct alternately on half cycles. Lamp current is controlled by monitoring onehalf of the average lamp current. The diode conducting on negative half cycles has one-tenth of its current diverted to the CCFL VC pin. This current nulls against the source current provided by the lamp-current programmer circuit. A single capacitor on the CCFL VC pin provides both stable loop compensation and an averaging function to the halfwave-rectified sinusoidal lamp current. Therefore, input programming current relates to one-half of average lamp current. This scheme reduces the number of loop compensation components and permits faster loop transient response in comparison to previously published circuits. If a floating-lamp configuration is used, ground the DIO pin. CCFL VC (Pin 4): This pin is the output of the lamp current programmer circuit and the input of the current comparator for the CCFL regulator. Its uses include frequency compensation, lamp-current averaging for grounded lamp circuits, and current limiting. The voltage on the CCFL VC pin determines the current trip level for switch turnoff. During normal operation this pin sits at a voltage between 0.95V (zero switch current) and 2.0V (maximum switch current) with respect to analog ground (AGND). This pin has a high impedance output and permits external voltage clamping to adjust current limit. A single capacitor to ground provides stable loop compensation. This simplified loop compensation method permits the CCFL regulator to exhibit single-pole transient response behavior and virtually eliminates transformer output overshoot. AGND (Pin 5): This pin is the low current analog ground. It is the negative sense terminal for the internal 1.24V reference and the ICCFL summing voltage in the LT1182/ LT1183/LT1184/LT1184F. It is also a sense terminal for the LCD dual input error amplifier in the LT1182/LT1183. Connect external feedback divider networks that terminate to ground and frequency compensation components that terminate to ground directly to this pin for best regulation and performance. SHUTDOWN (Pin 6): Pulling this pin low causes complete regulator shutdown with quiescent current typically reduced to 35A. The nominal threshold voltage for this pin is 0.85V. If the pin is not used, it can float high or be pulled to a logic high level (maximum of 6V). Carefully evaluate active operation when allowing the pin to float high. Capacitive coupling into the pin from switching transients could cause erratic operation. CCFL VSW (Pin 16): This pin is the collector of the internal NPN power switch for the CCFL regulator. The power switch provides a minimum of 1.25A. Maximum switch current is a function of duty cycle as internal slope compensation ensures stability with duty cycles greater than 50%. Using a driver loop to automatically adapt base drive current to the minimum required to keep the switch in a quasi-saturation state yields fast switching times and high efficiency operation. The ratio of switch current to driver current is about 50:1.
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LT1182/LT1183/LT1184/LT1184F
PIN FUNCTIONS
Bulb (Pin 15): This pin connects to the low side of a 7V threshold comparator between the BAT and Bulb pins. This circuit sets the maximum voltage level across the primary side of the Royer converter under all operating conditions and limits the maximum secondary output under start-up conditions or open lamp conditions. This eases transformer voltage rating requirements. Set the voltage limit to insure lamp start-up with worst-case, lamp start voltages and cold-temperature system operating conditions. The Bulb pin connects to the junction of an external divider network. The divider network connects from the center tap of the Royer transformer or the actual battery supply voltage to the top side of the current source "tail inductor". A capacitor across the top of the divider network filters switching ripple and sets a time constant that determines how quickly the clamp activates. When the comparator activates, sink current is generated to pull the CCFL VC pin down. This action transfers the entire regulator loop from current mode operation into voltage mode operation. BAT (Pin 14): This pin connects to the battery or battery charger voltage from which the CCFL Royer converter and LCD contrast converter operate. This voltage is typically higher than the VIN supply voltage but can be equal or less than VIN. However, the BAT voltage must be at least 2.1V greater than the internal 2.4V regulator or 4.5V minimum up to 30V maximum. This pin provides biasing for the lamp current programming block, is used with the Royer pin for floating lamp configurations, and connects to one input for the open lamp protection circuitry. For floating lamp configurations, this pin is the noninverting terminal of a high-side current sense amplifier. The typical quiescent current is 50A into the pin. The BAT and Royer pins monitor the primary side Royer converter current through an internal 0.1 top side current sense resistor. A 0A to 1A primary side, center tap converter current is translated to an input signal range of 0mV to 100mV for the current sense amplifier. This input range translates to a 0A to 500A sink current at the CCFL VC pin that nulls against the source current provided by the programmer circuit. The BAT pin also connects to the top side of an internal clamp between the BAT and Bulb pins. Royer (Pin 13): This pin connects to the center-tapped primary of the Royer converter and is used with the BAT pin in a floating lamp configuration where lamp current is controlled by sensing Royer primary side converter current. This pin is the inverting terminal of a high-side current sense amplifier. The typical quiescent current is 50A into the pin. If the CCFL regulator is not used in a floating lamp configuration, tie the Royer and BAT pins together. This pin is only available on the LT1182/LT1183/ LT1184F. VIN (Pin 12): This pin is the supply pin for the LT1182/ LT1183/LT1184/LT1184F. The ICs accept an input voltage range of 3V minimum to 30V maximum with little change in quiescent current (zero switch current). An internal, low dropout regulator provides a 2.4V supply for most of the internal circuitry. Supply current increases as switch current increases at a rate approximately 1/50 of switch current. This corresponds to a forced Beta of 50 for each switch. The ICs incorporate undervoltage lockout by sensing regulator dropout and lockout switching for input voltages below 2.5V. Hysteresis is not used to maximize the useful range of input voltage. The typical input voltage is a 3.3V or 5V logic supply. LT1182/LT1183 LCD VC (Pin 7): This pin is the output of the LCD contrast error amplifier and the input of the current comparator for the LCD contrast regulator. Its uses include frequency compensation and current limiting. The voltage on the LCD VC pin determines the current trip level for switch turnoff. During normal operation, this pin sits at a voltage between 0.95V (zero switch current) and 2.0V (maximum switch current). The LCD VC pin has a high impedance output and permits external voltage clamping to adjust current limit. A series R/C network to ground provides stable loop compensation. LCD PGND (Pin 8): This pin is the emitter of an internal NPN power switch. LCD contrast switch current flows through this pin and permits internal, switch-current sensing. The regulators provide a separate analog ground and power ground(s) to isolate high current ground paths from low current signal paths. Linear Technology recommends star-ground layout techniques.
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PIN FUNCTIONS
LCD VSW (Pin 9): This pin is the collector of the internal NPN power switch for the LCD contrast regulator. The power switch provides a minimum of 625mA. Maximum switch current is a function of duty cycle as internal slope compensation ensures stability with duty cycles greater than 50%. Using a driver loop to automatically adapt base drive current to the minimum required to keep the switch in a quasi-saturation state yields fast switching times and high efficiency operation. The ratio of switch current to driver current is about 50:1. LT1182 FBN (Pin 10): This pin is the noninverting terminal for the negative contrast control error amplifier. The inverting terminal is offset from ground by -12mV and defines the error amplifier output state under start-up conditions. The FBN pin acts as a summing junction for a resistor divider network. Input bias current for this pin is typically 1A flowing out of the pin. If this pin is not used, force FBN to greater than 0.5V to deactivate the negative contrast control input stage. The proximity of FBN to the LCD VSW pin makes it sensitive to ringing on the switch pin. A small capacitor (0.01F) from FBN to ground filters switching ripple. FBP (Pin 11): This pin is the inverting terminal for the positive contrast control error amplifier. The noninverting terminal is tied to an internal 1.244V reference. Input bias current for this pin is typically 0.5A flowing into the pin. If this pin is not used, ground FBP to deactivate the positive contrast control input stage. The proximity of FBP to the LCD VSW pin makes it sensitive to ringing on the switch pin. A small capacitor (0.01F) from FBP to ground filters switching ripple. LT1183 FB (Pin 10): This pin is the common connection between the noninverting terminal for the negative contrast error amplifier and the inverting terminal for the positive-contrast error amplifier. In comparison to the LT1182, the FBN and the FBP pins tie together and come out as one pin. This scheme permits one polarity of contrast to be regulated. The proximity of FB to the LCD VSW pin makes it sensitive to ringing on the switch pin. A small capacitor (0.01F) from FB to ground filters switching ripple. The FB pin requires attention to start-up conditions when generating negative contrast voltages. The pin has two stable operating points; regulating to 1.244V for positive contrast voltages or regulating to -12mV for negative contrast voltages. Under start-up conditions, the FB pin heads to a positive voltage. If negative contrast voltages are generated, tie a diode from the FB pin to ground. This ensures that the FB pin will clamp before reaching the positive reference voltage. Switching action then pulls the FB pin back to its normal servo voltage. LT1183/LT1184/LT1184F REF (Pin 11): This pin brings out the 1.244V reference. Its functions include the programming of negative contrast voltages with an external resistor divider network (LT1183 only) and the programming of lamp current for the ICCFL pin. LTC does not recommend using the REF pin for both functions at once. The REF pin has a typical output impedance of 45 on the LT1183 and a typical output impedance of 15 on the LT1184/LT1184F. Reference load current should be limited to a few hundred microamperes, otherwise reference regulation will be degraded. REF is used to generate the maximum programming current for the ICCFL pin by placing a resistor between the pins. PWM or DAC control subtracts from the maximum programming current. A small decoupling capacitor (0.1uF) is recommended to filter switching transients.
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BLOCK DIAGRAM
SHUTDOWN 6 LCD VSW 9
Q2
DRIVE 2
LOGIC 2
ANTISAT2 COMP2 D2 6V R3 1k Q5 1x 0A TO 100A Q6 2x Q11
+
R2 0.25 ILIM AMP2
-
GAIN = 4.4 Q3 2x
LCD
+--+ +
V2 1.24V
-
11 FBP
-12mV
8
7
10 FBN
LCD LCD PGND VC
LT1183: FBP AND FBN ARE TIED TOGETHER TO CREATE FB AT PIN 10. THE REFERENCE IS BROUGHT OUT TO PIN 11.
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LT1182/LT1183 CCFL/LCD Contrast Regulator Top Level Block Diagram
VIN 12 BAT 14 ROYER 13 SHUTDOWN 2.4V REGULATOR UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN CCFL VSW 16 200kHz OSC R4 0.1 LOGIC 1 DRIVE 1 Q1
-
gm
+
COMP1
ANTISAT1
+
ILIM AMP1 R1 0.125
-
GAIN = 4.4
+
CCFL
-
V1 0.45V
Q4 5x
Q7 9x
Q8 1x Q9 3x D1 Q10 2x
2 ICCFL
5 AGND
3 DIO
15 BULB
4 CCFL VC
1 CCFL PGND
1182 BD01
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LT1182/LT1183/LT1184/LT1184F
BLOCK DIAGRAM
SHUTDOWN 6
SHUTDOWN
0A TO 100A VREF 1.24V
11 REF
2 ICCFL
LT1184/LT1184F: REFERENCE IS BROUGHT OUT TO PIN 1. PINS 7, 8, 9, 10 ARE NO CONNECT.
APPLICATIONS INFORMATION
Introduction Current generation portable computers and instruments use backlit Liquid Crystal Displays (LCDs). These displays also appear in applications extending to medical equipment, automobiles, gas pumps, and retail terminals. Cold Cathode Fluorescent Lamps (CCFLs) provide the highest available efficiency in backlighting the display. Providing the most light out for the least amount of input power is the most important goal. These lamps require high voltage AC to operate, mandating an efficient high voltage DC/AC converter. The lamps operate from DC, but migration effects damage the lamp and shorten its lifetime. Lamp drive should contain zero DC component. In addition to good efficiency, the converter should deliver the lamp drive in the form of a sine wave. This minimizes EMI and RF emissions. Such emissions can interfere with other devices and can also degrade overall operating efficiency. Sinusoidal CCFL drive maximizes current-to-light conversion in the lamp. The circuit should also permit lamp intensity control from zero to full brightness with no hysteresis or "pop-on".
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LT1184/LT1184F CCFL Regulator Top Level Block Diagram
VIN 12 BAT 14 ROYER 13 2.4V REGULATOR UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN LT1184: HIGH-SIDE SENSE RESISTOR R4 AND GM AMPLIFIER ARE REMOVED. PIN 13 IS NO CONNECT. CCFL VSW 16 200kHz OSC R4 0.1 LOGIC 1 DRIVE 1 Q1
-
D2 6V R3 1k Q5 1x Q6 2x Q11 gm
+
COMP1
ANTISAT1
+
ILIM AMP1 R1 0.125
-
GAIN = 4.4
+
CCFL
Q3 2x Q4 5x Q7 9x Q8 1x Q9 3x D1 Q10 2x
-
V1 0.465V
5 AGND
3 DIO
15 BULB
4 CCFL VC
1 CCFL PGND
1184 BD02
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APPLICATIONS INFORMATION
Manufacturers offer a wide array of monochrome and color displays. LCD display types include passive matrix and active matrix. These displays differ in operating voltage polarity (positive and negative contrast voltage displays), operating voltage range, contrast adjust range, and power consumption. LCD contrast supplies must regulate, provide output adjustment over a significant range, operate over a wide input voltage range, and provide load currents from milliamps to tens of milliamps. The small size and battery-powered operation associated with LCD equipped apparatus dictate low component count and high efficiency for these circuits. Size constraints place severe limitations on circuit architecture and long battery life is a priority. Laptop and handheld portable computers offer an excellent example. The CCFL and its power supply are responsible for almost 50% of the battery drain. Displays found in newer color machines can have a contrast power supply battery drain as high as 20%. Additionally, all components including PC board and hardware, usually must fit within the LCD enclosure with a height restriction of 5mm to 10mm. The CCFL switching regulator in the LT1182/LT1183/ LT1184/LT1184F typically drives an inductor that acts as a switched mode current source for a current driven Royer class converter with efficiencies as high as 90%. The control loop forces the regulator to pulse-width modulate the inductor's average current to maintain constant current in the lamp. The constant current's value, and thus lamp intensity is programmable. This drive technique provides a wide range of intensity control. A unique lamp current programming block permits either groundedlamp or floating-lamp configurations. Grounded-lamp circuits directly control one-half of actual lamp current. Floating-lamp circuits directly control the Royer's primary side converter current. Floating-lamp circuits provide differential drive to the lamp and reduce the loss from stray lamp-to-frame capacitance, extending illumination range. The LCD contrast switching regulator in the LT1182/ LT1183 is typically configured as a flyback converter and generates a bias supply for contrast control. Other topology choices for generating the bias supply include a boost converter or a boost/charge pump converter. The supply's variable output permits adjustment of contrast for the majority of available displays. Some newer types of displays require a fairly constant supply voltage and provide contrast adjustment through a digital control pin. A unique, dual polarity, error amplifier and the selection of a flyback converter topology allow either positive or negative LCD contrast voltages to be generated with minor circuit changes. The difference between the LT1182 and LT1183 is found in the pinout for the inputs of the LCD contrast error amplifier. The LT1182 brings out the error amplifier inputs individually for setting up positive and negative polarity contrast capability. This feature allows an output connector to determine the choice of contrast operating polarity by a ground connection. The LT1183 ties the error amplifier inputs together and brings out an internal reference. The reference may be used in generating negative contrast voltages or in programming lamp current. Block Diagram Operation The LT1182/LT1183/LT1184/LT1184F are fixed frequency, current mode switching regulators. Fixed frequency, current mode switchers control switch duty cycle directly by switch current rather than by output voltage. Referring to the block diagram for the LT1182/LT1183, the switch for each regulator turns ON at the start of each oscillator cycle. The switches turn OFF when switch current reaches a predetermined level. The operation of the CCFL regulator in the LT1184/LT1184F is identical to that in the LT1182/ LT1183. The control of output lamp current is obtained by using the output of a unique programming block to set current trip level. The contrast voltage is controlled by the output of a dual-input-stage error amplifier, which sets current trip level. The current mode switching technique has several advantages. First, it provides excellent rejection of input voltage variations. Second, it reduces the 90 phase shift at mid-frequencies in the energy storage inductor. This simplifies closed-loop frequency compensation under widely varying input voltage or output load conditions. Finally, it allows simple pulse-by-pulse current limiting to provide maximum switch protection under output overload or short-circuit conditions. The LT1182/LT1183/LT1184/LT1184F incorporate a low dropout internal regulator that provides a 2.4V supply for most of the internal circuitry. This low dropout design allows input voltage to vary from 3V to 30V with little
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APPLICATIONS INFORMATION
change in quiescent current. An active low shutdown pin typically reduces total supply current to 35A by shutting off the 2.4V regulator and locking out switching action for standby operation. The ICs incorporate undervoltage lockout by sensing regulator dropout and locking out switching below about 2.5V. The regulators also provide thermal shutdown protection that locks out switching in the presence of excessive junction temperatures. A 200kHz oscillator is the basic clock for all internal timing. The oscillator turns on an output via its own logic and driver circuitry. Adaptive anti-sat circuitry detects the onset of saturation in a power switch and adjusts base drive current instantaneously to limit switch saturation. This minimizes driver dissipation and provides rapid turnoff of the switch. The CCFL power switch is guaranteed to provide a minimum of 1.25A in the LT1182/LT1183/ LT1184/LT1184F and the LCD power switch is guaranteed to provide a minimum of 0.625A in the LT1182/LT1183. The anti-sat circuitry provides a ratio of switch current to driver current of about 50:1. Simplified Lamp Current Programming A programming block in the LT1182/LT1183/LT1184/ LT1184F controls lamp current, permitting either groundedlamp or floating-lamp configurations. Grounded configurations control lamp current by directly controlling onehalf of actual lamp current and converting it to a feedback signal to close a control loop. Floating configurations control lamp current by directly controlling the Royer's primary side converter current and generating a feedback signal to close a control loop. Previous backlighting solutions have used a traditional error amplifier in the control loop to regulate lamp current. This approach converted an RMS current into a DC voltage for the input of the error amplifier. This approach used several time constants in order to provide stable loop frequency compensation. This compensation scheme meant that the loop had to be fairly slow and that output overshoot with startup or overload conditions had to be carefully evaluated in terms of transformer stress and breakdown voltage requirements. The LT1182/LT1183/LT1184/LT1184F eliminate the error amplifier concept entirely and replace it with a lamp current programming block. This block provides an easyto-use interface to program lamp current. The programmer circuit also reduces the number of time constants in the control loop by combining the error signal conversion scheme and frequency compensation into a single capacitor. The control loop thus exhibits the response of a single pole system, allows for faster loop transient response and virtually eliminates overshoot under startup or overload conditions. Lamp current is programmed at the input of the programmer block, the ICCFL pin. This pin is the input of a shunt regulator and accepts a DC input current signal of 0A to 100A. This input signal is converted to a 0A to 500uA source current at the CCFL VC pin. The programmer circuit is simply a current-to-current converter with a gain of five. By regulating the ICCFL pin, the input programming current can be set with DAC, PWM or potentiometer control. The typical input current programming range for 0mA to 6mA lamp current is 0A to 50A. The ICCFL pin is sensitive to capacitive loading and will oscillate with capacitance greater than 10pF. For example, loading the ICCFL pin with a 1x or 10x scope probe causes oscillation and erratic CCFL regulator operation because of the probe's respective input capacitance. A current meter in series with the ICCFL pin will also produce oscillation due to its shunt capacitance. Use a decoupling resistor of several kilo-ohms between the ICCFL pin and the control circuitry if excessive stray capacitance exists. This is basically free with potentiometer or PWM control as these control schemes use resistors. A current output DAC should use an isolating resistor as the DAC can have significant output capacitance that changes as a function of input code. Grounded-Lamp Configuration In a grounded-lamp configuration, the low voltage side of the lamp connects directly to the LT1182/LT1183/LT1184/ LT1184F DIO pin. This pin is the common connection between the cathode and anode of two internal diodes. In previous grounded-lamp solutions, these diodes were discrete units and are now integrated onto the IC, saving cost and board space. Bi-directional lamp current flows in the DIO pin and thus, the diodes conduct alternately on half
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APPLICATIONS INFORMATION
cycles. Lamp current is controlled by monitoring one-half of the average lamp current. The diode conducting on negative half cycles has one-tenth of its current diverted to the CCFL pin and nulls against the source current provided by the lamp current programmer circuit. The compensation capacitor on the CCFL VC pin provides stable loop compensation and an averaging function to the rectified sinusoidal lamp current. Therefore, input programming current relates to one-half of average lamp current. The transfer function between lamp current and input programming current must be empirically determined and is dependent on the particular lamp/display housing combination used. The lamp and display housing are a distributed loss structure due to parasitic lamp-to-frame capacitance. This means that the current flowing at the high voltage side of the lamp is higher than what is flowing at the DIO pin side of the lamp. The input programming current is set to control lamp current at the high voltage side of the lamp, even though the feedback signal is the lamp current at the bottom of the lamp. This insures that the lamp is not overdriven which can degrade the lamp's operating lifetime. Floating-Lamp Configuration In a floating-lamp configuration, the lamp is fully floating with no galvanic connection to ground. This allows the transformer to provide symmetric, differential drive to the lamp. Balanced drive eliminates the field imbalance associated with parasitic lamp-to-frame capacitance and reduces "thermometering" (uneven lamp intensity along the lamp length) at low lamp currents. Carefully evaluate display designs in relation to the physical layout of the lamp, it leads and the construction of the display housing. Parasitic capacitance from any high voltage point to DC or AC ground creates paths for unwanted current flow. This parasitic current flow degrades electrical efficiency and losses up to 25% have been observed in practice. As an example, at a Royer operating frequency of 60kHz, 1pF of stray capacitance represents an impedance of 2.65M. With an operating lamp voltage of 400V and an operating lamp current of 6mA, the parasitic current is 150A. The efficiency loss is 2.5%. Layout techniques that increase parasitic capacitance include long high voltage lamp leads, reflective metal foil around the lamp, and displays supplied in metal enclosures. Losses for a good display are under 5% whereas losses for a bad display range from 5% to 25%. Lossy displays are the primary reason to use a floatinglamp configuration. Providing symmetric, differential drive to the lamp reduces the total parasitic loss by one-half. Maintaining closed-loop control of lamp current in a floating lamp configuration now necessitates deriving a feedback signal from the primary side of the Royer transformer. Previous solutions have used an external precision shunt and high side sense amplifier configuration. This approach has been integrated onto the LT1182/ LT1183/LT1184F for simplicity of design and ease of use. An internal 0.1W resistor monitors the Royer converter current and connects between the input terminals of a high-side sense amplifier. A 0A to 1A Royer primary side, center tap current is translated to a 0A to 500uA sink current at the CCFL VC pin to null against the source current provided by the lamp current programmer circuit. The compensation capacitor on the CCFL VC pin provides stable loop compensation and an averaging function to the error sink current. Therefore, input programming current is related to average Royer converter current. Floatinglamp circuits operate similarly to grounded-lamp circuits, except for the derivation of the feedback signal. The transfer function between primary side converter current and input programming current must be empirically determined and is dependent upon a myriad of factors including lamp characteristics, display construction, transformer turns ratio, and the tuning of the Royer oscillator. Once again, lamp current will be slightly higher at one end of the lamp and input programming current should be set for this higher level to insure that the lamp is not overdriven. The internal 0.1 high-side sense resistor on the LT1182/ LT1183/LT1184F is rated for a maximum DC current of 1A. However, this resistor can be damaged by extremely high surge currents at start-up. The Royer converter typically uses a few microfarads of bypass capacitance at the center tap of the transformer. This capacitor charges up when the system is first powered by the battery pack or an AC wall adapter. The amount of current delivered at start-up can be
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APPLICATIONS INFORMATION
very large if the total impedance in this path is small and the voltage source has high current capability. Linear Technology recommends the use of an aluminum electrolytic for the transformer center tap bypass capacitor with an ESR greater than or equal to 0.5. This lowers the peak surge currents to an acceptable level. In general, the wire and trace inductance in this path also help reduce the di/ dt of the surge current. This issue only exists with floating lamp circuits as grounded-lamp circuits do not make use of the high-side sense resistor. Optimizing Optical Efficiency vs Electrical Efficiency Evaluating the performance of an LCD backlight requires the measurement of both electrical and photometric efficiencies. The best optical efficiency operating point does not necessarily correspond to the best electrical efficiency. However, these two operating points are generally close. The desired goal is to maximize the amount of light out for the least amount of input power. It is possible to construct backlight circuits that operate with over 90% electrical efficiency, but produce significantly less light output than circuits that operate at 80% electrical efficiency. The best electrical efficiency typically occur's just as the CCFL's transformer drive waveforms begin to exhibit artifacts of higher order harmonics reflected back from the Royer transformer secondary. Maximizing electrical efficiency equates to smaller values for the Royer primary side, resonating capacitor and larger values for the Royer secondary side ballast capacitor. The best optical efficiency occurs with nearly ideal sinusoidal drive to the lamp. Maximizing optical efficiency equates to larger values for the Royer primary side resonating capacitor and smaller values for the Royer secondary side ballast capacitor. The preferred operating point for the CCFL converter is somewhere in between the best electrical efficiency and the best optical efficiency. This operating point maximizes photometric output per watt of input power. Making accurate and repeatable measurements of electrical and optical efficiency is difficult under the best circumstances. Requirements include high voltage measurements and equipment specified for this operation, specialized calibrated voltage and current probes, wideband RMS voltmeters, a photometer, and a calorimeter (for the backlight enthusiast). Linear Technology's Application Note 55 and Design Note 101 contain detailed information regarding equipment needs. Input Supply Voltage Operating Range The backlight/LCD contrast control circuits must operate over a wide range of input supply voltage and provide excellent line regulation for the lamp current and the contrast output voltage. This range includes the normal range of the battery pack itself as well as the AC wall adapter voltage, which is normally much higher than the maximum battery voltage. A typical input supply is 7V to 28V; a 4 to 1 supply range. Operation of the CCFL control circuitry from the AC wall adapter generates the worst-case stress for the CCFL transformer. Evaluations of loop compensation for overshoot on startup transients and overload conditions are essential to avoid destructive arcing, overheating, and transformer failure. Open-lamp conditions force the Royer converter to operate open-loop. Component stress is again worst-case with maximum input voltage conditions. The LT1182/LT1183/LT1184/LT1184F open-lamp protection clamps the maximum transformer secondary voltage to safe levels and transfers the regulator loop from current mode operation into voltage mode operation. Other fault conditions include board shorts and component failures. These fault conditions can increase primary side currents to very high levels, especially at maximum input voltage conditions. Solutions to these fault conditions include electrical and thermal fuses in the supply voltage trace. Improvements in battery technology are increasing battery lifetimes and decreasing battery voltages required by the portable systems. However, operation at reduced battery voltages requires higher, turns-ratio transformers for the CCFL to generate equivalent output drive capability. The penalty incurred with high ratio transformers is higher, circulating currents acting on the same primary side components. Loss terms increase and electrical efficiency often decreases.
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APPLICATIONS INFORMATION
Size Constraints Tighter length, width, and height constraints for CCFL and LCD contrast control circuitry are the result of LCD display enclosure sizes remaining fairly constant while display screen sizes have increased. Space requirements for connector hardware include the input power supply and control signal connector, the lamp connector, and the contrast output voltage connector. Even though size requirements are shrinking, the high voltage AC required to drive the lamp has not decreased. In some cases, the use of longer bulbs for color, portable equipment has increased the high voltage requirement. Accommodating the high voltage on the circuit board dictates certain layout spacings and routings, involves providing creepages and clearances in the transformer design, and most importantly, involves routing a hole underneath the CCFL transformer. Routing this hole minimizes high voltage leakage paths and prevents moisture buildup that can result in destructive arcing. In addition to high voltage layout techniques, use appropriate layout techniques for isolating high current paths from lowcurrent signal paths. This leaves the remaining space for control circuitry at a premium. Minimum component count is required and minimum size for the components used is required. This squeeze on component size is often in direct conflict with the goals of maximizing battery life and efficiency. Compromise is often the only remaining choice. LCD Contrast Circuits The LCD contrast switching regulator on the LT1182/ LT1183 operates in many standard switching configurations and is used as a classic DC/DC converter. The dualinput-stage error amplifier easily regulates either positive or negative contrast voltages. Topology choices for the converter include single inductor and transformer-based solutions. The switching regulator operates equally well either in continuous mode or discontinuous mode. Efficiencies for LCD contrast circuits range from 75% to 85% and depend on the total power drain of the particular display. Adjustment control of the LCD contrast voltage is provided by either potentiometer, PWM, or DAC control. Applications Support Linear Technology invests an enormous amount of time, resources, and technical expertise in understanding, designing and evaluating backlight/LCD contrast solutions for system designers. The design of an efficient and compact LCD backlight system is a study of compromise in a transduced electronic system. Every aspect of the design is interrelated and any design change requires complete re-evaluation for all other critical design parameters. Linear Technology has engineered one of the most complete test and evaluation setups for backlight designs and understands the issues and tradeoffs in achieving a compact, effficient and economical customer solution. Linear Technology welcomes the opportunity to discuss, design, evaluate, and optimize any backlight/LCD contrast system with a customer. For further information on backlight/LCD contrast designs, consult the references listed below. References 1. Williams, Jim. August 1992. Illumination Circuitry for Liquid Crystal Displays. Linear Technology Corporation, Application Note 49. 2. Williams, Jim. August 1993. Techniques for 92% Efficient LCD Illumination. Linear Technology Corporation, Application Note 55. 3. Bonte, Anthony. March 1995. LT1182 Floating CCFL with Dual Polarity Contrast. Linear Technology Corporation, Design Note 99. 4. Williams, Jim. April 1995. A Precision Wideband Current Probe for LCD Backlight Meaasurement. Linear Technology Corporation, Design Note 101.
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19
LT1182/LT1183/LT1184/LT1184F
TYPICAL APPLICATIONS N
90% Efficient Grounded CCFL Configuration with Negative Polarity LCD Contrast
UP TO 6mA C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20 Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 L1 = COILTRONICS CTX210605 L2 = COILTRONICS CTX100-4 L3 = COILTRONICS CTX02-12403 *DO NOT SUBSTITUTE COMPONENTS COILTRONICS (407) 241-7876 THE ICCFL CURRENT REQUIRED FOR AN RMS BULB CURRENT IS: ICCFL (9 x 10-3) (IBULB). 0% TO 90% DUTY CYCLE FOR THE PWM SIGNAL CORRESPONDS TO 0 TO 6mA. D5 BAT85 L2 100H V (PWM) 0V TO 5V 1kHz PWM R4 38.3k 1% 1 R5,38.3k, 1% 2 3 C7, 1F 4 5 SHUTDOWN 6 C8,0.68F 7 R7, 10k 8 CCFL PGND ICCFL DIO LT1183 CCFL VC AGND SHDN LCD VC LCD PGND ROYER VIN REF FB LCD VSW CCFL VSW BULB BAT 16 15 N = 1:2 14 13 VIN 3V D4 1N914 D1 1N5818 C5 1000pF R2 220k 3 2 1 C3B 2.2F 35V R1 750 4 5 10 LAMP C2 27pF 3kV L1
C6 2.2F
+
20
U
6
+
+
C3A 2.2F 35V
BAT 8V TO 28V
C1* 0.068F R3 100k
+
Q1*
Q2*
C12 2.2F 35V D3 1N5934A 4 24V D2 1N914 2 L3
VARYING THE V(CONTRAST) VOLTAGE FROM 0V TO 5V GIVES VARIABLE NEGATIVE CONTRAST FROM -10V TO -30V
6
+
9
C11 22F 35V NEGCON
+
12 11 10 9 V (CONTRAST) 0V TO 5V R10, 10k, 1% C9 0.01F
C4 2.2F
R9, 4.99k, 1%
C10 0.1F R11 40.2k 1% D5 1N4148
1182 TA02
LT1182/LT1183/LT1184/LT1184F
TYPICAL APPLICATIONS N
LT1184F Floating CCFL with Potentiometer Control of Lamp Current
UP TO 6mA ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR 0.5 TO PREVENT DAMAGE TO THE LT1184F HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON. C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20 Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 L1 = COILTRONICS CTX210605 L2 = COILTRONICS CTX100-4 *DO NOT SUBSTITUTE COMPONENTS COILTRONICS (407) 241-7876 C5 1000pF R2 220k 3 2 1 C3B 2.2F 35V R1 750 4 5 LAMP C2 27pF 3kV L1
0A TO 45A ICCFL CURRENT GIVES 0mA TO 6mA LAMP CURRENT FOR A TYPICAL DISPLAY. D5 BAT85
C7, 1F 4 5 SHUTDOWN 6 7 8
U
10
6
+
+
C3A 2.2F 35V
BAT 8V TO 28V
C1* 0.068F R3 100k
Q2*
Q1*
L2 100H 1 2 3 CCFL PGND ICCFL DIO CCFL VSW BULB BAT 16 15 14
D1 1N5818
LT1184F 13 CCFL VC ROYER AGND SHDN NC NC VIN REF NC NC 12 11 10 9 R4 15.4k 1% R5 50k 10 TURN
+
C4 2.2F
VIN 3V
1182 TA03
21
LT1182/LT1183/LT1184/LT1184F
TYPICAL APPLICATIONS N
LT1182/LT1183 ICCFL PWM Programming
V (PWM) 0V TO 5V 1kHz PWM 0% to 90% DC = 0A to 50A R1 40.5k R2 40.5k TO ICCFL PIN
+
C1 2.2F
R1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA04
LT1184/LT1184F ICCFL PWM Programming
V (PWM) 0V TO 5V 1kHz PWM 0% to 90% DC = 0A to 50A R1 40.35k R2 40.35k TO ICCFL PIN
+
C1 2.2F
R1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA05
LT1183 ICCFL Programming with Potentiometer Control
R1 15.9k VREF R1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE. ICCFL = 12A TO 50A. R2 50k TO ICCFL PIN
1182 TA06
LT1184/LT1184F ICCFL Programming with Potentiometer Control
R1 15.5k VREF R1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE. ICCFL = 12A TO 50A. R2 50k TO ICCFL PIN
1182 TA07
LT1182/LT1183/LT1184/LT1184F ICCFL Programming with DAC Control
R1 5k DAC TO ICCFL PIN STRAY OUTPUT CAPACITANCE CURRENT SOURCE DAC R1 DECOUPLES THE DAC OUTPUT CAPACITANCE FROM THE ICCFL PIN.
1182 TA12
22
U
LT1183 ICCFL PWM Programming with VREF
FROM VREF V (PWM) 0V TO 5V 1kHz PWM 0% to 90% DC = 0A to 50A R1 330 Q1 VN2222L R2 7.15k R3 7.15k TO ICCFL PIN C1 22F R1 PREVENTS OSCILLATION. R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA08
+
LT1184/LT1184F ICCFL PWM Programming with VREF
FROM VREF V (PWM) 0V TO 5V 1kHz PWM 0% to 90% DC = 0A to 50A R1 330 Q1 VN2222L R2 6.98k R3 6.98k TO ICCFL PIN C1 22F R1 PREVENTS OSCILLATION. R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA09
+
LT1183 ICCFL PWM Programming with VREF
FROM VREF R1 3.57k V (PWM) 0V TO 5V 1kHz PWM 10 to 100% DC = 50A TO 0A R2 3.57k R3 7.15k TO ICCFL PIN Q1 VN2222L
+
C1 22F R1, R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA10
LT1184/LT1184F ICCFL PWM Programming with VREF
FROM VREF R1 3.48k V (PWM) 0V TO 5V 1kHz PWM 10 to 100% DC = 50A TO 0A R2 3.48k R3 6.98k TO ICCFL PIN Q1 VN2222L
+
C1 22F R1, R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.
1182 TA11
LT1182/LT1183/LT1184/LT1184F
TYPICAL APPLICATIONS N
LT1182 LCD Contrast Positive Boost Converter
BAT 8V TO 28V L3 50H COILTRONICS CTX50-4
1 2 3 4 5 C8 0.068F 6 R7 33K 7 8
CCFL PGND ICCFL DIO
CCFL VC AGND SHDN LCD VC LCD PGND
LT1182 LCD Contrast Positive Boost/Charge Pump Converter
BAT 8V TO 28V L3 50H COILTRONICS CTX50-4 C11 22F 35V D5 1N914 D4 1N914
1 2 3 4 5 C8 0.068F 6 R7 33K 7 8
CCFL PGND ICCFL DIO
BAT
14 VIN 3V
LT1182 13 CCFL VC ROYER AGND SHDN LCD VC LCD PGND VIN FBP FBN LCD VSW 12 11 10 9
+
C4 2.2F
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
+
U
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C13 2.2F 35V
CCFL VSW BULB BAT LT1182 ROYER VIN FBP FBN LCD VSW
16 15 14 13 VIN 3V D5 1N914
+
C11 22F 35V
POSCON VOUT VIN
R12 20k R13 8.45k 1% C10 0.01F R14 1.21k 1%
1182 TA12
+
12 11 10 9
C4 2.2F
+
C13 2.2F 35V
CCFL VSW BULB
16 15
+
C11 22F 35V
POSCON VOUT VIN
R12 20k R13 8.45k 1%
C10 0.01F
R14 1.21k 1%
1182 TA13
23
LT1182/LT1183/LT1184/LT1184F
TYPICAL APPLICATIONS N
LT1182 LCD Contrast Positive to Negative/Charge Pump Converter
1 2 3 4 5 C8 0.068F 6 R7 33K 7 CCFL PGND ICCFL DIO 16 15 14 VIN 3V
CCFL VSW BULB BAT
LT1182 13 CCFL VC ROYER AGND SHDN LCD VC VIN FBP FBN LCD VSW 12 11 10 9
+
8 LCD PGND
R9 4.99k 1% 5V
R10 10k 1%
R11 20k 1%
1182 TA14
RELATED PARTS
PART NUMBER LT1107 LT1172 LT1173 LT1186 LT1372 FREQUENCY 63kHz Hysteretic 100kHz 24kHZ Hysteretic 200kHz 500kHz SWITCH CURRENT 1A 1.25A 1A 1.25A 1.5A DESCRIPTION Micropower DC/DC Converter for LCD Contrast Control Current Mode Switching Regulator for CCFL or LCD Contrast Control Micropower DC/DC Converter for LCD Contrast Control CCFL Switching Regulator with DAC for "Bits to Brightness Control" Current Mode Switching Regulator for CCFL or LCD Contrast Control
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted. S Package 16-Lead Plastic SOIC
0.386 - 0.394* (9.804 - 10.008)
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254)
0.053 - 0.069 (1.346 - 1.752) 0 - 8 TYP
0.004 - 0.010 (0.101 - 0.254)
16
15
14
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
0.228 - 0.244 (5.791 - 6.197)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
1
2
3
24
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
(c) LINEAR TECHNOLOGY CORPORATION 1995
+
U
U
+
C13 2.2F 35V
L3 CTX50-4 COILTRONICS CTX50-4 C11 22F 35V D5 1N914 C11 22F 35V
BAT 8V TO 28V
+
C4 2.2F
NEGCON |VOUT| VIN
C9 0.01F
D4 1N914
13
12
11
10
9
0.150 - 0.157* (3.810 - 3.988)
4
5
6
7
8
LT/GP 0495 10K * PRINTED IN USA

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